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[VHDL-FPGA-VerilogI2C_loader

Description: 用FPGA做主控制器,对IIC从设备配置参数的源程序。Xilinx提供-FPGA master controller, right from the IIC equipment configuration parameters of the source. Xilinx offer
Platform: | Size: 93184 | Author: cloud | Hits:

[assembly languageC51CrossLight

Description: 1.设计一个交通灯控制器。 2.利用学习机上的发光二极管,设定东、南、西、北4个方向,各3个灯(红、黄、绿)。交通灯控制器正常工作时,南北方向红灯亮3秒,黄灯闪2秒,绿灯亮3秒,以此类推。东西方向绿灯亮3秒,黄灯闪2秒,红灯亮3秒,以此类推。 3.设定两个紧急按钮,一个控制南北灯,一个控制东西灯。当按下相应的紧急键时,其控制方向的交通灯亮绿灯,其他方向的交通灯亮红灯,至自控键松开,恢复正常交通控制。 -1. Design of a traffic light controller. 2. Use of learning machine on the LED and set the East, South, West, North 4 direction, the three lights (red, yellow, green). Traffic signal controller normal working hours, the north- and south-bound red light three seconds, two seconds flashing yellow light, green light-three seconds, and so on. East-west direction green three seconds, two seconds flashing yellow light, red light three seconds, and so on. 3. Set two emergency buttons, a north-south control lights, a light control things. When pressing the corresponding key emergency, its control the traffic lights green, the other direction, the traffic lights class. Key to loose control and restore normal traffic control.
Platform: | Size: 10240 | Author: wangpeng | Hits:

[source in ebookChapter6Sample

Description: Chapter6Sample,FPGA嵌入式开发书籍的源码,其中含有USB控制器的设计 VHDL语言开发-Chapter6Sample, FPGA embedded development books source code, USB controller contains the VHDL Design Development
Platform: | Size: 141312 | Author: 求知 | Hits:

[source in ebookChapter7Sample

Description: Chapter6Sample,FPGA嵌入式开发书籍的源码,其中含有USB控制器的设计 VHDL语言开发-Chapter6Sample, FPGA embedded development books source code, USB controller contains the VHDL Design Development
Platform: | Size: 10240 | Author: 求知 | Hits:

[VHDL-FPGA-VerilogDDR_SDRAM_Controller

Description: DDR RAM控制器的VHDL源码,实现平台是Lattice FPGA,功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
Platform: | Size: 677888 | Author: 钟方 | Hits:

[VHDL-FPGA-Verilogocidec3_IDE_controller

Description: 硬盘控制器VHDL源代码,实现了PIO和DMA方式,请支持-hard disk controller VHDL source code and realized the PIO and DMA mode, please support
Platform: | Size: 38912 | Author: | Hits:

[SCMzuihoudeyanjiu

Description: 步进电机控制,控制器,控制电机的VHDL源程序,,多平台 Digital_030423.rar - 服务器的的板在载控制器的AHDL程序,包括原理图编译,用-stepper motor control, controllers, motor control VHDL source files, and Multi-platform Digital_030423.rar-server contains the controller board in the tap procedure , including diagram compiler, and
Platform: | Size: 17408 | Author: | Hits:

[MiddleWarePOC

Description: 基于VHDL的POC接口控制器,用于CPU与打印机间的数据控制-based on the POC VHDL interface controller, CPU and printer for the data control
Platform: | Size: 83968 | Author: marscr | Hits:

[VHDL-FPGA-Verilogtraffic_control

Description: 设计制作一个用于十字路口的交通灯控制器 有一组绿、黄、红灯用于指挥交通,绿灯、黄灯和红灯的持续时间分别为20秒、5秒和25秒; 当有特殊情况(如消防车、救护车等)时,两个方向均为红灯亮,计时停止,当特殊情况结束后,控制器恢复原状态,继续正常运行-design a crossroads for the traffic signal controller is a group in green, yellow and red lights to direct traffic. green, yellow and red, respectively for the duration of 20 seconds, five seconds and 25 seconds; When special circumstances (such as fire engines, ambulances and the like), in both directions were red light, stop time, when the special circumstances after the controller to restore the original state, continue normal operations
Platform: | Size: 2048 | Author: 飘来的南风 | Hits:

[Otherlattice_sdram_source_code

Description: lattice sdram 控制器的源码,VHDL语言编码 包括仿真文件-lattice sdram controller source code, including VHDL simulation document coding
Platform: | Size: 31744 | Author: dido wang | Hits:

[Linux-Unixtraffic5

Description: VHDL编写的异步通信控制器源代码程序 -VHDL prepared by the asynchronous communication controller source code procedures
Platform: | Size: 4096 | Author: zhu | Hits:

[VHDL-FPGA-Verilogvhdladc0809

Description: adcint,是adc0809的采样控制器设计!-adcint is adc0809 sampling controller design!
Platform: | Size: 46080 | Author: 李海燕 | Hits:

[Otherliftor

Description: 基于VHDL语言的实用电梯控制器的设计 源程序经Xilinx公司的Foundation软件仿真 -based on VHDL practical elevator controller design source by Xilinx's Foun dation Simulation Software
Platform: | Size: 2048 | Author: 杨洋 | Hits:

[Othercanvhdl

Description: can总线控制器的原代码,是用vhdl写的,我没有验证过,不保证正确性。可以作为参考。 -can Bus Controller's original code is written in vhdl, I have not tested, it does not guarantee accuracy. Can be used as reference.
Platform: | Size: 31744 | Author: 吴明诗 | Hits:

[VHDL-FPGA-Verilog6FloorLift

Description: 设计一个6层电梯控制器。电梯控制器是按照乘客的要求自动上、下的装置。 1、每层电梯入口处设置上下请求开关,电梯内设有顾客到达层次的停站请求开关。 2、设有电梯所处位置指示装置以及电梯运行模式(上升或者下降)指示装置。 3、电梯每秒升降一层楼。 4、电梯到达有停站请求的楼层,经过1秒电梯门打开,开门4秒后,电梯门关闭(开门指示灯灭),电梯继续运行,直至执行完最后一个请求信号后停留在当前层。 5、电梯能记忆电梯内外所有请求信号,并按照电梯运行规则按顺序响应,每个请求信号保留至有电梯响应后消除。 6、初始状态为一层开门,第一层不用向下开关,最高层不用向上开关。 7、电梯运行规则:当电梯上升时,只响应比电梯所在位置高的上楼请求信号,由下而上逐个执行,直到最后一个上楼请求执行完毕;如果高层有下楼请求,则直接升到下楼请求的最高楼层,然后进入下降模式。当电梯处于下降模式时与上升正好相反。 -design of a six-story elevator controller. Elevator Controller in accordance with the requirements of passengers automatically, the device. 1, installed on each floor elevator entrance next request switches, elevator begins to reach the level of customer stops request switch. 2, the location of elevator and escalator installations instructions operation mode (up or down) device instructions. 3, Elevator per second floor landing. 4, the lift reached a request stops floors seconds after an elevator doors open door four seconds later, elevator doors closed (to open the door to eliminate light), the continued operation of the lift, End until the implementation of the final request for a signal to stay in the current layer. 5, the lift will lift internal and external memory signal to all reques
Platform: | Size: 2048 | Author: zheng | Hits:

[VHDL-FPGA-Verilogfpgalcddriver

Description: 基于FPGA液晶控制器设计与实现,采用VHDL硬件描述语言。-FPGA-based LCD controller design and implementation using VHDL hardware description language.
Platform: | Size: 92160 | Author: 张杰 | Hits:

[VHDL-FPGA-VerilogTrafficLights_VHDL

Description: 交通灯信号控制器,VHDL语言编写,已实验通过,具体见RAR注释-traffic signal controller, VHDL language, experiment, see specific RAR Notes
Platform: | Size: 4096 | Author: 小花猫 | Hits:

[File Formatte3560

Description: 基于VHDL语言的实用电梯控制器的设计 -based on VHDL practical elevator controller design based on VHDL practical Elevator Controller VHDL design based on the practical design of the elevator controller based on VHDL practical elevator controller design
Platform: | Size: 94208 | Author: | Hits:

[VHDL-FPGA-Verilogxst3_video

Description: 基于XILINX的XC3系列FPGA的VGA控制器的VHDL源程序。-based on the XC3 XILINX FPGA series VGA controller VHDL source.
Platform: | Size: 162816 | Author: xuphone | Hits:

[VHDL-FPGA-VerilogFIFO

Description: 异步FIFO控制器的Verilog设计与实现-Asynchronous FIFO controller Verilog Design and Implementation
Platform: | Size: 5120 | Author: 陈晨 | Hits:
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